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Freescale Semiconductor Technical Data
Document Number: MC33385 Rev. 6.0, 11/2006
Quad Low-side Driver
The MC33385 is a Quad Low-side Driver fully protected switch. This device is a general purpose Low-side Driver but has been especially designed to operate in engine management applications as injector driver or automotive gear box. It is interfaced directly with a microcontroller for parallel control of the load and the individual output diagnostic is done through a SPI. The diagnostic logic recognizes 4 failure types at each output stage: overcurrent, short to GND, open load, and over-temperature. Features * RDSON of 250m per Output at 25C * Supplied from the main 5V VCC * Input CMOS Compatible * Diagnostic through SPI * Nominal Current of 2A per Output * Current Limitation at 3A with Automatic Turn Off * Output Internally Clamped at 50V typ for Inductive Load Drive * Junction to Case Thermal Resistance of 4.4C/W * Individual Output over Temperature Shutdown * Pb-Free Packaging Designated by Suffix Code VW
33385
LOW-SIDE DRIVER
DH SUFFIX VW SUFFIX (PB-FREE) 98ASH70702A 20-PIN HSOP
ORDERING INFORMATION
Device MC33385DH/R2 MC33385VW/R2 Temperature Range (TA) -40C to 125C Package
20 HSOP
VPWR
Voltage Regulator VCC
33385
OUT1 OUT2 OUT3 OUT4 GND1-4
MCU
NCS CLK SDI SDO NRE NON1 NON2 NON3 NON4
Figure 1. MC33385 Simplified Application Diagram
There are no disclaimers required on the Final publication of a data sheet. (c) Freescale Semiconductor, Inc., 2007. All rights reserved.
BLOCK DIAGRAM
BLOCK DIAGRAM
VCC
TRIGGER
Charge Pump
NON1 NON2 NON3 NON4
RES URES Over-temp. detection URES RES S DRIVER R
OUT1 OUT2 dv/dt control OUT3 OUT4
FR Reset VCC
IRES
ON1 I-SCB filter t-ISCB ON1
SDI VCC I-OL filter t-IOL
CLK VCC Shift Register NCS
IRES
NON1 Failure Register (FR) SCG filter t-SCG
URES RES
Vref
OSC
SDO
Under Voltage Reset
Reset
Oscillator
GND
NRES
Figure 2. 33385 Simplified Internal Block Diagram
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Analog Integrated Circuit Device Data Freescale Semiconductor
PIN CONNECTIONS
PIN CONNECTIONS
21
GND2 1 OUT2 2 N.C 3 NON2 4 SDI 5
20 GND1 19 OUT1 18 N.C 17 NON1 16 SDO
Heat sink
CLK 6 NCS 7 NON4 8 OUT4 9 GND4 10
21 15 NRES 14 VCC 13 NON3 12 OUT3 11 GND3
Figure 3. 33385 Pin Connections Table 1. 33385 Pin Definitions
Pin Number 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 OUT1 GND1 Case NON2 SDI CLK NCS NON4 OUT4 GND4 GND3 OUT3 NON3 Vcc NRES SDO NON1 Pin Name GND2 OUT2 Ground 2 Output Channel 2 NC Input Control Signal for Channel 2 Serial Data Input Clock Line for Serial Interface Chip Select for Serial Interface Input Control Signal for Channel 4 Output Channel 4 Ground 4 Ground 3 Output Channel 3 Input Control Signal for Channel 3 5V Power Supply Reset Input Data Output of Serial Interface Input Control Signal Channel 1 NC Output Channel 1 Ground 1 Connected to the PCB Ground for Thermal Purposes Definition
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ELECTRICAL CHARACTERISTICS MAXIMUM RATINGS
ELECTRICAL CHARACTERISTICS
MAXIMUM RATINGS
Table 2. Maximum Ratings All voltages are with respect to ground unless otherwise noted. Exceeding these ratings may cause a malfunction or permanent damage to the device.
Ratings ELECTRICAL RATINGS Voltage Range Continuous Output Voltage (With no reverse current) Continuous Current Peak Output Current Clamped Energy at the Switching OFF (See Figure 9) Input Voltage (Inputs) Input Protection Diode Current Input Voltage (Outputs) Input Protection Diode Current THERMAL RATINGS Operating Junction Temperature Thermal Resistance : Junction-case (One power stage in use) Thermal Resistance : Junction-ambient (Device soldered on printed circuit board) Peak Package Reflow Temperature During Reflow (1), (2) TJ RTHJC RTHJA TPPRT 150 4.5 50 Note 2 C k k C Vcc VOUT IOUTC IOUTP WOFF VIN IIN VO IO 7.0 45 2.5 ISCBMAX 70 VCC + 0.3 1.0 VCC + 0.3 1.0 V V A A mJ for 1ms V mA V mA Symbol Value Unit
Notes 1. Pin soldering temperature limit is for 10 seconds maximum duration. Not designed for immersion soldering. Exceeding these limits may cause malfunction or permanent damage to the device. 2. Freescale's Package Reflow capability meets Pb-free requirements for JEDEC standard J-STD-020C. For Peak Package Reflow Temperature and Moisture Sensitivity Levels (MSL), Go to www.freescale.com, search by part number [e.g. remove prefixes/suffixes and enter the core ID to view all orderable parts. (i.e. MC33xxxD enter 33xxx), and review parametrics.
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ELECTRICAL CHARACTERISTICS STATIC CHARACTERISTICS
STATIC CHARACTERISTICS
Table 3. Static Electrical Characteristics Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic SUPPLY VOLTAGE Supply Voltage Range JUNCTION TEMPERATURE Junction Temperature Continuous (Continuous) Junction Temperature Dynamical (Time limited) OUTPUT CURRENT Output Current Range RESET BEHAVIOUR Reset Changeable (at NRES-Pin) Undervoltage Reset (Independent of NRES) Active for VCC = 0V to VCCPRO UNDERVOLTAGE PROTECTION Protection active for VCC =0V to VCCPRO OVER TEMPERATURE Temperature Detection Threshold SUPPLY CURRENT Standby Current (without load) (NON1...NON4 = High Level) 5.15V VCC 5.5V VCC Operating Mode (For 5.15V VCC) (Iout 1...4) = 2A ICC During Reverse Output Current (IOUT = - 5A on one output) INPUTS (NONx, NCS, CLK, NRES, SDI) Low Threshold High Threshold Hysteresis Input Current (VIN = VCC) Input Current (VCC >VRES & 0V33385
Analog Integrated Circuit Device Data Freescale Semiconductor
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ELECTRICAL CHARACTERISTICS STATIC CHARACTERISTICS
Table 3. Static Electrical Characteristics (continued) Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic Leakage Current 1 (NON = High, VOUT = 25V, VCC = 5V) Leakage Current 2 (NON = High, VOUT = 16V, VCC = 1V) Output Clamp Voltage (IOUT = 1A) Matching Clamp Voltage (Between two outputs) Clamped Energy at the Switching OFF (See Figure 9) On Resistance (IOUT = 2A, TJ = 150C, NON = LOW) Output Low Voltage Limitation (IOUT = 150mA) Output Capacitance (Guaranteed by design) OUTPUTS REVERSE DIODE Reverse Output Current Reverse Peak current Reverse Voltage Drop - IOUT = - 5A - IOUT = - 2,5A POWERSTAGE PROTECTION Short Current Limit VCC Undervoltage DIAGNOSTIC Short to GND Threshold Voltage for IOUT 2A Open Load Threshold Current Pull-up Resistor Temperature Detection Threshold
Notes
(1)
Symbol IOUTL IOUTL2 VCLP VCLPM WOFF RDSON VOUTLIM COUT
Min
Typ
Max 10 10
Unit A A V V mJ for 1ms
45 VCLP-1 50
50
58 VCLP+1
500 65 220 350
m mV pF
IRD IRDP
2,5 5.0
A A
VRD1 VRD2
1.0 0.85
1.7 1.7
V V
ISCB VCCMIN
3.0 3.35
5 3.95
A V
VREF IOL ROL TOFF
0.390xVCC 10 2.0 155
0.435xVCC 50 8.0 185
V mA k C
1.
For t 2ms. Max. reverse current is limited to - 10A (for all outputs together)
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ELECTRICAL CHARACTERISTICS DYNAMIC CHARACTERISTIC
DYNAMIC CHARACTERISTIC
Table 4. Dynamic Electrical Characteristics Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic INPUTS Input Frequency (NON1 to NON4) OUTPUTS TIMING Positive Output Voltage Ramp (with inductive load) VOUT = 4V... 16V VOUT = 16V... Vclp Negative Output Voltage Ramp (25%... 75%) OVRP1 OVRP2 OVRN tDCP 2.0 3.5 1.75 3.0 6.0 3.0 5.0 10 4.0 40 V/s V/s V/s s fIN 0.0 1000 Hz Symbol Min Typ Max Unit
Internal Switch-on-Time Charge Pump (NON = LOW... VGATE = 0.9 * VBAT) Turn ON Delay (NON = 50%, VOUT = 0.9 * VBAT) Turn OFF Delay (NON = 50%, VOUT = 0.1 * VBAT) (NON = 50%, VOUT = 4V) Undervoltage Protection Max ON time after a output voltage ramp from 0V to 25V at VCC = 0V...VCCPRO Matching Turn ON Delay (NON = 50%, VOUT = 0.9 * VBAT) Rise time Turn OFF (10% - 90% of VCLP) DIAGNOSTIC Short to GND Filter Time Open Load Filter Time SERIAL DIAGNOSTIC LINK : LOAD CAPACITOR AT SDI AND SDO = 100PF Clock Frequency (50% duty cycle) Minimum Time CLK = HIGH Minimum Time CLK = LOW Propagation Delay (CLF Data at SDO valid) NCS = LOW to Data at SDO Valid CLK Low Before NCS Low (Setup time CLK to NCS change High/Low) CLK Change Low/High after NCS = Low SDI Input Set up Time (CLK change High/Low after SDI data valid) SDI Input Hold Time (SDI data hold after CLK change High/Low) CLK Low Before NCS High
tDON
1.0
2.5
5.0
s
tDOFFA tDOFFB tRPON
1.0 4.7
3.0 7.5 100
s s s
tMON
- 3.0
3.0
s
tROFF
8.5
12
s
TSCG tOL
140 140
250 250
s s
fCLK tCLH tCLL tPCLD tPCLD tSCLCH tHCLCL tSCLD tHCLD tSCLCL
3.0 100 100 100 100 100
MHz ns ns ns ns ns
100 20
ns ns
20 150
ns ns
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ELECTRICAL CHARACTERISTICS DYNAMIC CHARACTERISTIC
Table 4. Dynamic Electrical Characteristics (continued) Characteristics noted under conditions 7.0 V VSUP 18 V, - 40C TA 125C, GND = 0 V unless otherwise noted. Typical values noted reflect the approximate parameter means at TA = 25C under nominal conditions unless otherwise noted.
Characteristic CLK High After NCS High NCSLow/High to Output Data Flout Capacitance at SDI, SDO, CLk, CS NCS Filter time (Pulses tFNCS will be ignored) Symbol tHCLCH tPCHDZ tPCLD tFNCS 10 Min 150 100 10 40 Typ Max Unit ns ns pF ns
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ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS
TIMING DIAGRAMS
NCS CLK SDO SDI FR-RESET
FSL LSB D1 D2 D3 D4 D5 D6 MSB
LSB
D1
D2
D3
D4
D5
D6
MSB
NOTE : FR -RESET means Reset failure storage (internal signal)
Figure 4. Timing Diagram to Read the Diagnostic Register
MSB
LSB D6 D5 D4 D3 D2 D1 D0 FSL
D7
FAILURE INDICATOR BIT Only valid during NCS = LOW to the first Low to High CLK change 1 : failure stored 0 : no failure STATUS CHANNEL 4 11 : no failure 01 : open circuit 10: short to battery or overtemperature 00 : short to gnd STATUS CHANNEL 3 STATUS CHANNEL 2 STATUS CHANNEL 1
Figure 5. Diagnostic Failure Register Structure
.
NCS
tSCLCH tHCLCH tCLH tCLL tSCLCH tHCLCH
CLK
tCSDV tPCLD FSL tCSDV D0 tHCLD D0 D1 D7 tPCHDZ D7
SDO
SDI
Figure 6. Serial Interface Timing
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ELECTRICAL CHARACTERISTICS TIMING DIAGRAMS
Failure detection time for an SCG failure
NON
off on SCG-failure
VDRAIN
VDRAIN < VREF at off-state
t-SCG (filter-time)
Filter time
Failure detection
Failure store
Figure 7. Diagram to Short-Circuit to GND Failure (SCG-Failure) Detection
Sporadic failure detection Statical failure detection
Failure detection active for an sporadic OL-failure
NON
off on
Iload
I-OL
Iload > I-OL
Iload > IOL for t > tol
Diagnostic active
retrigger t filter retrigger filter t < t-ol
t-ol (filter-time)
tol Sporadic failure-detection
Failure detection
Failure store
Figure 8. Diagram to Open Load Failure (OL-Failure) Detection
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ELECTRICAL CHARACTERISTICS ELECTRICAL PERFORMANCE CURVES
350 300 250 Energy (mJ) 200 150 100 50 0 0 0,5 1,5 1 2 2,5 Pulse-Duration (ms)
- 40C
25C
125C
3
3,5
4
Figure 9. Max Clamp- Energy Specification
ELECTRICAL PERFORMANCE CURVES
380 3 375 2,75 2,50
ICCSTB (mA) VCC=5,5V
370 365
VINL/VCC
2,25 2 1,75 1,50 1,25 1 -50 -25 0 25 50 75 T, TEMPERATURE (C) 100 125
VCC=5,15V VCC=5,5V
360 355 350 345 340 -50 -25 0 25 50 75 T, TEMPERATURE (C) 100 125
VCC=4,5V
Figure 10. Standby Current versus Temperature
12,50 12,00 11,50
ICCOPM (mA)
Figure 12. Low Threshold Input Voltage versus Temperature
624 623 622 621 VinH/Vcc 620 619 618
VCC=4,5V ou 5,5V
11,00
10,50 10,00 9,50 9,00 8,50 -50
VCC=5,15V All outputs=2A
617 100 125 616 -50 -25 0 25 50 75 T, TEMPERATURE (C) 100 125
-25
0 25 50 75 T, TEMPERATURE (C)
Figure 11. Operating Mode Current versus Temperature Figure 13. High Threshold Input Voltage versus Temperature
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ELECTRICAL CHARACTERISTICS ELECTRICAL PERFORMANCE CURVES
55,00 54,50 54,00
VCCMIN (V)
3,78 3,77 3,76 3,75 3,74 3,73 3,72 3,71 -25 0 25 50 75 T, TEMPERATURE (C) 100 125 3,70 -50 -25 0 25 50 75 T, TEMPERATURE (C) 100 125
53,50
VCLP (V)
53,00 52,50 52,00 51,50 51,00 -50 IOUT1=1A
Figure 14. Output Clamp Voltage versus Temperature
400 375 350 RDSON (m) 325 300 275 250 225 200 -50 -25 0 25 50 75 T, TEMPERATURE (C) 100 125
ISCB (A) VCC=4,5V IOUT1=3A
Figure 17. Vcc Undervoltage versus Temperature
4,60 4,50 4,40 4,30 4,20 4,10 4,00 3,90 3,80 -50
VCC=4,5V VCC=5,5V
-25
0 25 50 75 T, TEMPERATURE (C)
100
125
Figure 15. Rdson versus Temperature
24,50 24,25 24,00 23,75 IOL (mA) 23,50 23,25 23,00 22,75 22,50 -50
Figure 18. Short Current Limit versus Temperature
-25
0 25 50 75 T, TEMPERATURE (C)
100
125
Figure 16. Open Load versus Temperature
Figure 19. Inductive Switching
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ELECTRICAL CHARACTERISTICS ELECTRICAL PERFORMANCE CURVES
In1 (1V/div) VOUT1(2V/div) tDOFFA tDOFFB In1 (1V/div)
tDON
VOUT1(2V/div)
Figure 20. Turn on Delay
Figure 21. Turn off Delay
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FUNCTIONAL DESCRIPTION INTRODUCTION
FUNCTIONAL DESCRIPTION
INTRODUCTION
The device is a Quad Low-side Driver driven by four CMOS input stages. Each output power transistor is protected against short to VBAT by a zener clamp against overvoltage. A diagnostic logic recognizes four failure types at the output stage : overcurrent, short to GND, open-load and overtemperature. The failures are individually stored in a byte which can be read out via the serial interface (SPI). If the current through the output stage is lower than the IOL-reference, after a filter time an OL failure will be recognized. This measurement is active while the power stage is switched on. The SCG failure will recognize when the drain voltage is lower than the OL reference limit, while the output stage is switched off. All four outputs have an independent overtemperature detection and shutdown. All failures are stored in individual registers. They can be read by the microprocessor via the serial interface. There is no failure detected if the power stage control time is shorter than the filter time.
OUTPUT STAGE CONTROL
Each of the four output stages is switched ON and OFF by an individual control line (NON-Input). The logic level of the control line is CMOS compatible. The output transistors are switched off when the inputs are not connected.
DIAGNOSTIC INTERFACE
The communication between the microprocessor and the failure register runs via the SPI link. If there is a failure stored in the failure register, the first bit of the shift register is set to a high level. With the High/Low change on the NCS pin, the first bit of the diagnostic shift register will be transmitted to the SDO output. The SDO output is the serial output from the diagnostic shift register and it is put into a tri-state when the NCS pin is high. The CLK pin clocks the diagnostic shift register. New SDO data will appear on every rising edge of this pin and new SDI data will be latched on every CLK's falling edge into the shift register. With the first positive pulse of the CLK, the failure register will be cleared. There is no bus collision at a small spike at the NCS. The CLK is always LOW while the NCS-signal is changing.
POWER TRANSISTORS
Each of the four output stages has its own zener clamp. This causes a voltage limitation at the power transistors when inductive loads are switched off. The drain voltage ramp occurring when output is switched on or off, is within defined limits. Output transistors can be connected in parallel to increase current capability. In this case, the associated inputs should be connected together.
SHORT-CIRCUIT AND OVERTEMPERATURE PROTECTION
If the output current increases above the short current limit for a time longer than tSCB or if the temperature increases above TOFF then the power transistor is immediately switched off. It remains switched off until the control signal on the NON-Input is switched off and on again.
RESET
There are two different reset functions realized : Under voltage reset : as long as the VCC voltage is lower than VCCRES, the power stages are switched off and the failure-registers are reset. Reset pin : as long as the NRES-pin is low, following circuits are reset : * Power stages * Failure register
DIAGNOSTICS
The following failures at the output stage are recognized : Short -Circuit to VBAT or overtemp = SCB (Highest priority) Short -Circuit to GND.................... = SCG Open Load...................................... = OL (Lowest priority) The SCB failure is recognized by an overcurrent (current above the short current limit) or an overtemperature.
UNDERVOLTAGE PROTECTION
At low VCC voltage, the device remains switched off even if there is a voltage ramp at the OUT pin.
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Analog Integrated Circuit Device Data Freescale Semiconductor
PACKAGING PACKAGE DIMENSIONS
PACKAGING
PACKAGE DIMENSIONS
For the most current package revision, visit www.freescale.com and perform a keyword search using the "98A" listed below.
DH SUFFIX VW (PB-FREE) SUFFIX 20-PIN HSOP PLASTIC PACKAGE 98ASH70702A ISSUE B
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Analog Integrated Circuit Device Data Freescale Semiconductor
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PACKAGING PACKAGE DIMENSIONS
PACKAGE DIMENSIONS (CONTINUED)
DH SUFFIX VW (PB-FREE) SUFFIX 20-PIN HSOP PLASTIC PACKAGE 98ASH70702A ISSUE B
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Analog Integrated Circuit Device Data Freescale Semiconductor
REVISION HISTORY
REVISION HISTORY
REVISION 6.0
DATE 11/2006
DESCRIPTION OF CHANGES * * * Implemented Revision History page Added Pb-Free suffix code VW Converted to Freescale format, and adjusted to the prevailing form and style
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Analog Integrated Circuit Device Data Freescale Semiconductor
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MC33385 Rev. 6.0 11/2006

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